Released Date: 4/17/2024
Verilog Model Revision: 3.8
Parallelx32 Datasheet Reference: revision X.7

Changes:
Add ADDR control for read access


Released Date: 9/30/2024
Verilog Model Revision: 3.9
Parallelx32 Datasheet Reference: revision X.7

Changes:
Add CE control for write access


Released Date: 10/07/2024
Verilog Model Revision: 3.10
Parallelx32 Datasheet Reference: revision X.7

Changes:
Update timing access for write


Released Date: 03/19/2025
Verilog Model Revision: 3.11
Parallelx32 Datasheet Reference: revision X.7

Changes:
Support 20ns higher for page mode write access


Released Date: 05/15/2025
Verilog Model Revision: 3.12
Parallelx32 Datasheet Reference: revision Z.3

Changes:
Add write/read access of registers per each die
Update the write protect feature to be per die


Released Date: 07/10/2025
Verilog Model Revision: 3.13
Parallelx32 Datasheet Reference: revision Z.3

Changes:
Include the tDHP check for the state transtion condition of first page write access


Released Date: 01/26/2026
Verilog Model Revision: 3.14
Parallelx32 Datasheet Reference: revision Z.3

Changes:
Update the signal counters in case of signal change async toggling


